N-type schottky barrier tunnel transistor and manufacturing method thereof

ABSTRACT

An n-type SBTT and a manufacturing method thereof are provided. The SBTT includes a silicon layer, a gate, a double layer that has a rare-earth metal silicide layer and a transition metal silicide layer. The silicon layer has a channel region. The gate is formed in an overlapping manner on the channel region and has a gate dielectric layer on its interface with respect to the silicon layer. The double layer is formed as a source/drain that has the channel region interposed on the silicon layer.

CROSS-REFERENCE TO RELATED PATENT APPLICATION

This application claims the benefit of Korean Patent Application No.10-2004-0109298, filed on Dec. 21, 2004, in the Korean IntellectualProperty Office, the disclosure of which is incorporated herein in itsentirety by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor device, and moreparticularly, to an n-type Schottky barrier tunnel transistor (SBTT) anda manufacturing method thereof.

2. Description of the Related Art

As a semiconductor device is microminiaturized in its size, a leakagecurrent due to a short channel effect is remarkably increased and anoperation characteristic of the semiconductor device is deteriorated. Toovercome these problems, lots of researches are under progress. For oneof examples, an SBTT may be suggested.

The SBTT may be recognized as a device having a possibility of solving aproblem caused by a shallow junction between a source/drain electrodeand a channel which is a crucial technical factor for suppressing theshort channel effect as a metal oxide semiconductor field effecttransistor (MOSFET) is currently scaled down, and additionally solving aproblem caused by a gate oxide layer.

In the n-type SBTT, rare-earth metal silicide formed by havingrare-earth metal react to silicon (Si) may be used for the source andthe drain electrodes. The rare-earth metal silicide has a small workfunction and thus has a considerably small Schottky barrier with respectto the silicon. Therefore, the rare-earth metal silicide may beconsidered as having a large saturated current compared with transitionmetal silicide. Nevertheless, the rare-earth metal silicide may show avery weak thermal stability but shows a large electric specificresistance and thus is examined as having a small saturated currentsubstantially.

Studies on forming a source and a drain of the n-type SBTT of a relatedart have been primarily concentrated on forming a rare-earth metalsuicide of a single layer by performing a thermal treatment afterdepositing rare-earth metal having a small work function on a siliconsubstrate. Nevertheless, when forming the source and the drain with therare-earth metal silicide of the single layer, an electric resistance isrelatively large, whereby a larger saturated current cannot be obtained.Therefore, to overcome this disadvantage, it is very important to reducea parasitic resistance that might be unnecessarily generated due to alarge electric specific resistance without destroying a small Schottkybarrier between the source and the drain formed with the rare-earthmetal silicide.

SUMMARY OF THE INVENTION

The present invention provides an n-type SBTT of a source/drainstructure and a manufacturing method thereof capable of reducing aparasitic resistance while introducing rare-earth metal silicide so asto form lower Schottky barrier.

The present invention also provides an n-type SBTT, which includes: asilicon layer for a channel region; a gate formed in an overlappingmanner on the channel region on the silicon layer and having adielectric layer interposed on an interface of the silicon layer;rare-earth metal silicide layers formed as a source/drain that has thechannel region interposed on the silicon layer; and transition metalsilicide layers formed on the rare-earth metal silicide layer, forconstituting the source/drain together with the rare-earth metalsilicide layers.

The rare-earth metal silicide layer can be extended toward a channelregion side so that part of the rare-earth metal silicide layer isoverlapped under the gate.

The silicon layer can be so configured that a surface of a silicon layerportion in the channel region has a relatively high step than that of asilicon layer portion under the rare-earth metal silicide layer.

According to an aspect of the present invention, there is provided amethod for manufacturing an n-type SBTT, which includes: introducing asilicon layer for a channel region; forming, on the silicon layer, agate overlapped on the channel region and having a dielectric layerinterposed on an interface of the silicon layer; forming a rare-earthmetal silicide layer on the silicon layer in a neighborhood of the gate;and forming a transition metal silicide layer on the rare-earth metalsilicide layer to form a source/drain that includes the rare-earth metalsuicide layer and the transition metal silicide layer.

At this point, the forming of the rare-earth metal silicide layercomprises: forming a rare-earth metal layer on the silicon layer; andthermally treating the rare-earth metal layer so that the rare-earthmetal layer reacts to the silicon to form the rare-earth metal silicidelayer, and continuing the thermal treatment so that the silicon isdiffused out and precipitated on a surface of the rare-earth metalsilicide layer to form a silicon-precipitated layer.

Further, the forming the transition metal silicide layer comprises:forming a transition metal layer on the silicon-precipitated layer; andthermally treating the transition metal layer under a temperature lowerthan a temperature of the thermal treatment for the rare-earth metalsilicide layer so that the transition metal layer reacts to thesilicon-precipitated layer to form the transition metal silicide layer.

According to another aspect of the present invention, there is provideda method for manufacturing an n-type SBTT, which includes: introducing asilicon layer for a channel region; forming, on the silicon layer, gatesoverlapped on the channel region and having a dielectric layerinterposed on an interface of the silicon layer; forming a rare-earthmetal layer on the silicon layer in a neighborhood of the gates; forminga transition metal layer on the rare-earth metal layer; and thermallytreating the rare-earth metal layer and the transition metal layer toform a source/drain that includes a double layer having a rare-earthmetal silicide layer and a transition metal silicide layer.

Here, the rare-earth metal silicide layer can include a silicide ofrare-earth metal such as Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu.

The transition metal silicide layer can include a silicide of transitionmetal such as Ni, Ti, Co, Fe, and Mo.

The silicon layer can be a silicon layer on an upper side of SOI(silicon-on-insulator) substrate.

Further, an operation of forming a spacer on a sidewall of the gatebefore forming the rare-earth metal silicide layer can be furtherprovided. An operation of having a step generated on the silicon layerportion where the source/drain is to be formed in a neighborhood of thespacer by performing a spacer etching for forming the spacer togetherwith an over-etching can be further provided.

According to the present invention, it is possible to improve asaturated current by forming the transition metal silicide having veryexcellent electrical conductivity on the rare-earth metal silicide inorder to reduce a parasitic resistance of the rare-earth metal silicidethat forms a small Schottky barrier but has a large electric resistance.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features and advantages of the present inventionwill become more apparent by describing in detail exemplary embodimentsthereof with reference to the attached drawings in which:

FIG. 1 is a cross-sectional view schematically illustrating an n-typeSBTT according to an embodiment of the present invention;

FIGS. 2 through 5 are cross-sectional views schematically illustratingan example of a method for manufacturing an n-type SBTT according to anembodiment of the present invention; and

FIGS. 6 through 9 are cross-sectional views schematically illustratinganother example of a method for manufacturing an n-type SBTT accordingto an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will now be described more fully with reference tothe accompanying drawings, in which exemplary embodiments of theinvention are shown. The invention may, however, be embodied in manydifferent forms and should not be construed as being limited to theembodiments set forth herein; rather, these embodiments are provided sothat this disclosure will be thorough and complete, and will fullyconvey the concept of the invention to those skilled in the art. In thedrawings, the thicknesses of layers and regions are exaggerated forclarity.

The embodiment of the present invention suggests a method for forming asilicide of a two-story structure without an undesired increase of theSchottky barrier capable of improving an operation characteristic of theSBTT by reducing a parasitic resistance of a source and a drain in ann-type SBTT manufactured by replacing the source and the drain withrare-earth metal silicide. Introduction of the rare-earth metal silicidefor the source and the drain of the n-type SBTT can cause a considerablysmall Schottky barrier compared with the silicon due to a small workfunction of the rare-earth metal silicide. Therefore, the rare-earthmetal silicide comes to have a large saturated current compared with thesilicide of the transition metal. On the contrary, the rare-earth metalsilicide is vulnerable to heat and has a large specific resistance. Toovercome these disadvantages, it should be crucially considered toeffectively reduce the parasitic resistance without the increase of thesmall Schottky barrier of the source and the drain formed by therare-earth metal silicide.

To solve the problems in the source/drain structure that has introducedthe rare-earth metal silicide, introduction of an oxidation preventionlayer of the rare-earth metal silicide or a metal electrode having asmall electric resistance can be considered. The present inventionsolves the problems of the single structure in the rare-earth metalsilicide using the source/drain formed in a two-story layered silicidestructure. That is, the present invention suggests a structure such thata silicide layer that contacts a silicon channel is formed with therare-earth metal silicide and the a surface that corresponds to anexternal electrode is formed with the transition metal silicide havingan excellent electrical conductivity. Accordingly, the device accordingto the present invention can reduce thermal vulnerability of therare-earth metal silicide and the parasitic resistance accompanied bythe source/drain.

Further, the introduction of the two-story layered silicide structurehas an advantage of substantially preventing an increase of a Schottkybarrier height due to destruction of the interface between the siliconchannel and the rare-earth metal silicide. That is, when the transitionmetal silicide directly contacts the silicon channel, the Schottkybarrier height is increased and the saturated current can be ratherreduced. Therefore, in the embodiment of the present invention, when atwo-story film structure silicide is formed, a boundary between therare-earth metal silicide and the transition metal silicide isdefinitely formed.

The above-described two-story layered silicide structure can be formedby the following two methods. First, a method of increasing atemperature of a thermal treatment after sequentially depositing therare-earth metal and the transition metal on the silicon of thesource/drain region can be considered. If this method is performed, thesilicon acts as a diffuser in case of the rare-earth metal silicide andthus the silicon is diffused toward the rare-earth metal layer so thatthe rare-earth metal silicide is formed and subsequently the silicon isdiffused toward the transition metal layer. Resultantly, the transitionmetal silicide is formed by the diffusion of the transition metal andthe silicon on the surface. This method goes through a considerablysensitive process with respect to temperature and time.

According to another method, the rare-earth metal is deposited on thesilicon region first and the deposited rare-earth metal is thermallyprocessed so that the rare-earth metal silicide is formed. At thispoint, the silicon forms the rare-earth metal silicide depending onthermal treatment conditions and is diffused into and precipitated onthe surface. After the transition metal is deposited on the precipitatedsilicon layer, the deposited transition metal is thermally treated undera temperature lower than the case of the rare-earth metal silicide, sothat the transition metal silicide is formed. By processing as describedabove, it is possible to reduce the parasitic resistance of thesource/drain and thus increase the saturated current without asubstantial increase of the Schottky barrier height. At this point, areaction temperature of the transition metal silicide should be lowerthan the temperature for use in forming the rare-earth metal silicide.Ni can be considered for a representative example of such transitionmetal.

FIG. 1 is a cross-sectional view schematically illustrating an n-typeSBTT according to an embodiment of the present invention. FIGS. 2through 5 are cross-sectional views schematically illustrating anexample of a method for manufacturing an n-type SBTT according to anembodiment of the present invention.

Referring to FIG. 2 with consideration of the structure illustrated inFIG. 1, the SBTT according to the embodiment of the present invention isformed on a semiconductor substrate, e.g., a P-type SOI(silicon-on-insulator) substrate. The SOI substrate includes a siliconsubstrate layer 110 for mechanical support, an insulation layer 130 of aburied-insulation-oxidation layer, and an active silicon layer 150 onthe insulation layer 130. The silicon layer 150 is patterned using a dryetching so that the active silicon layer 150 in which a source/drain isto be formed is formed.

At this point, if the device is manufactured with a thickness of thesilicon layer 150 on the SOI substrate made thin, a thickness of thechannel region controlled by a gate is reduced and thus formation of aninversion layer can be controlled in a very easier manner. Resultantly,a leakage current between a source and a drain of a transistor can bereduced.

Referring to FIG. 3, a gate dielectric layer 210 is formed on thesilicon layer 150, a layer for a gate 230 is formed on the gatedielectric layer 210, and patterning is performed so that the gate 230is formed. At this point, the gate dielectric layer 210 can include aninsulation layer such as a silicon oxide layer, an aluminum oxide layer,and hafnium oxide layer. The gate 230 can be formed as including aconductive polysilicon layer. The pattering of the gate 230 can beperformed by forming a mask using a photoetching process that uses aphotoresist and performing a selective-dry etching that uses a mask.

Referring to FIG. 4, for forming a spacer 250 between the source, thedrain, and the gate 230, a silicon oxide layer is thermally formed andthe silicon oxide layer is spacer-etched using a dry-etching.

Since the SBTT provides much flexibility in the thermal treatmenttemperature unlike field effect transistors (FETs) that form a sourceand a drain by diffusing impurities into the substrate, a very simplethermal treatment process can be utilized so as to form a gate spacer.Further, regions in which a source, a drain, and a gate electrodes areto be formed are prepared by removing an oxide layer portion except thegate spacer 250 using a dry-etching. At this point, for improving asaturated current, an over-etching may be performed on the regions inwhich the source and the drain are to be formed as illustrated in FIG. 4so that an overlap between the silicide, that will be formed later, andthe gate 230 may be improved.

Referring to FIG. 5, the rare-earth metal layer and the transition metallayer are sequentially deposited on the source and the drain using thefirst method for forming the silicide of the two-story layeredstructure. At this point, the rare-earth metal layer can be formed usingmetal such as Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu. For thetransition metal, metal such as Ni, Ti, Co, Fe, and Mo can be used.

After that, the thermal treatment is performed using a furnace for arapid thermal annealing or a general furnace and metal layer portionsthat are not converted into the silicide are selectively removed so thatthe silicide 310 and 410 of the two-story structure is formed. Thesilicide of the two-story structure is formed in form of a stackedstructure in which the rare-earth metal silicide layer 310 by therare-earth metal layer and the transition metal silicide layer 410 bythe transition metal layer are stacked. By formation of the silicide 310and 410 of the two-story structure, the source/drain is formed.

At this point, the rare-earth metal silicide layer can include silicideof rare-earth metal such as Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu,and the transition metal silicide layer can include silicide oftransition metal such as Ni, Ti, Co, Fe, and Mo.

In the meantime, a rare-earth metal silicide layer 311 and a transitionmetal silicide layer 411 can remain on the gate 230 exposed during thesilicide forming process.

FIGS. 6 through 9 are cross-sectional views schematically illustratinganother example of a method for manufacturing an n-type SBTT accordingto an embodiment of the present invention.

Referring to FIG. 6 with consideration of FIG. 1, after the gate 230 andthe gate spacer 250 are formed as described with reference to FIGS. 2through 4, the rare-earth metal layer is deposited on the source and thedrain. After that, the rare-earth metal silicide layer 320 is formed byheating the deposited rare-earth metal layer using a furnace for a rapidthermal annealing or a general furnace so that the silicon may react tothe rare-earth metal. At this point, a metal layer portion that is notconverted into silicide can be selectively removed. Further, therare-earth metal silicide layer 326 can remain also on the exposed gate230.

Referring to FIG. 7, the silicide forming process for forming therare-earth metal silicide layer 320 can be performed so that the siliconis diffused out and precipitated on a surface of the rare-earth metalsilicide layer 320. That is, if the thermal treatment for use in formingthe silicide continues to be performed, the silicon of the source/drainis constantly diffused out and thus precipitated on the surface of therare-earth metal silicide layer 320. Accordingly, a silicon-precipitatedlayer 500 can be formed on the surface of the rare-earth metal silicidelayer 320.

Referring to FIG. 8, a transition metal layer 420 is deposited on thesilicon-precipitated layer 500. At this point, though the transitionmetal layer 420 exists only on the silicon-precipitated layer 500according to FIG. 8, the transition metal layer 420 can be extended toother portions substantially.

Referring to FIG. 9, after the transition metal layer 420 is deposited,the deposited transition metal layer 420 is thermally treated under atemperature lower than the formation temperature of the rare-earth metalsilicide so that the deposited transition metal layer 420 may beconverted into silicide. Accordingly, a transition metal silicide layer425 is formed on the rare-earth metal silicide layer 320, whereby asuicide 320 and 425 of a two-story film structure is finally obtained onthe source/drain. At this point, another silicide 321 and 421 of atwo-story film structure can be formed also on the gate 230.

Further, Ni is used for a proper transition metal. Ni can react to theprecipitated silicon to produce the transition metal silicide under atemperature range of about 350° C. or higher. Therefore, the thermaltreatment for use in forming the transition metal silicide layer 425 canbe performed under at least about 350° C. or higher.

It is possible to manufacture the SBTT of the silicide having thetwo-story layered structure which is suggested by the present inventionusing a series of the processes described with reference to thedrawings.

Referring to FIG. 1, the source and the drain of the SBTT are formed inthe two-story structure that includes the transition metal silicidelayer 400 formed with the silicon and the transition metal on therare-earth metal silicide layer 300 formed with the silicon and therare-earth metal. That is, the boundary contacting the channel region ofthe silicon layer 150 is formed with the rare-earth metal silicide layer300 having a small work function and the transition metal silicide layer400 does not directly contact the channel region. At this point, therare-earth metal silicide layer 301 and the transition metal silicidelayer 401 can be additionally formed also on the gate 230 and used for agate electrode.

According to the present invention, it is possible to increase thesaturated current by forming the transition metal silicide havingexcellent electrical conductivity on the rare-earth metal silicide inorder to reduce the parasitic resistance of the rare-earth metalsilicide having a small Schottky barrier but having a large electricresistance.

The present invention can be used in realizing a multi-bit memoryelement.

While the present invention has been particularly shown and describedwith reference to exemplary embodiments thereof, it will be understoodby those of ordinary skill in the art that various changes in form anddetails may be made therein without departing from the spirit and scopeof the present invention as defined by the following claims.

1. An n-type Schottky barrier tunnel transistor comprising: a siliconlayer for a channel region; a gate overlapping on the channel region onthe silicon layer; a dielectric layer on an interface between thesilicon layer and the gate; rare-earth metal silicide layers formed as asource/drain that has the channel region interposed on the siliconlayer; and transition metal silicide layers formed on the rare-earthmetal silicide layer, for constituting the source/drain together withthe rare-earth metal silicide layers.
 2. The SBTT of claim 1, whereinthe rare-earth metal silicide layer is extended toward the channelregion so that a part of the rare-earth metal silicide layer isoverlapped under a gate.
 3. The SBTT of claim 1, wherein the siliconlayer is configured such that a surface of a silicon layer portion thatcorresponds to the channel region has a relatively high step than thatof a silicon layer portion under the rare-earth metal silicide layer. 4.The SBTT of claim 1, wherein the rare-earth metal silicide layercomprises a silicide of rare-earth metal selected from the groupconsisting of Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu.
 5. The SBTT ofclaim 1, wherein the transition metal silicide layer comprises asilicide of transition metal selected from the group consisting of Ni,Ti, Co, Fe, and Mo.
 6. The SBTT of claim 1, wherein the silicon layercomprises a silicon layer on an upper side of an SOI(silicon-on-insulator) substrate.